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Description dual d- type flip- flop with set and reset; positive- edge trigger 74hc74 datasheet ( html) - nxp semiconductors 74hc74 product details general description the 74hc/ hct74 are high- speed si- gate cmos devices and are pin compatible with low power schottky ttl ( lsttl). Features output drive capability: 10 lsttl loads outputs directly interface to cmos, nmos, and ttl operating voltage range: 2. They are specified in compliance with jedec standard no. They have individual data ( nd), clock ( ncp), set ( nsd) and reset ( nrd) inputs, and complementary nq and nq outputs. General description the 74hchct74 are dual positive edge triggered d- type flip- flop. F) pdf | html product details find other d- type flip- flops technical documentation = top documentation for this product selected by ti design & development. 0 a high noise immunity characteristic of cmos devices in compliance with the jedec standard no. Data sheet snx4hc74 dual d- type positive- edge- triggered flip- flops with clear and preset datasheet ( rev. 0 v low input current: 1. 3 description sn74hc74, sn54hc74 scls094f – december 1982 – revised june snx4hc74 dual d- type positive- edge- triggered flip- flops with clear and preset features buffered inputs wide operating voltage range: 2 v to 6 v wide operating temperature range: - 40° c to + 85° c supports fanout up to 10 lsttl loads.
7a requirements esd performance: hbm v; machine model 200 v. Com dual d- type flip- flop with preset and clear mm74hc74a the mm74hc74a utilizes advanced silicon− gate cmos technology to achieve operating speeds similar to the equivalent ls− ttl part.
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